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Part No.
Brand
DateCode
Desc
Qty
Price
1742837
2402-3P
ISSI
6168
1742838
2401B-2PLI
ISSI
6169
1742866
23SC1604-P
ISSI
6174
1746633
216MPA4AKA22HK
ISSI
5934
1747271
21285-AA
ISSI
6058
1747345
21154AC/DC1113B
ISSI
6072
1750481
1X16
ISSI
5709
1751192
1S632V1024L-10T
ISSI
5848
1751193
1S62WV1288BLL-55TLI
ISSI
5848
1751194
1S62C256-70V
ISSI
5848
1751195
1S61QB22M18-250M3
ISSI
5848
1755761
1977391-1
ISSI
5764
1763991
16-3G
ISSI
6393
1764037
16-2G
ISSI
6402
1766241
1461LV6416-10B
ISSI
5858
1766625
13690481
ISSI
5932
1767241
13.000000MHZ
ISSI
6052
1768700
12164-3G
ISSI
6336
1777290
1064131
ISSI
6062
1780253
100036-512
ISSI
5665
1780922
08-3G
ISSI
5795
1780927
08-2G
ISSI
5796
1791508
04-3G
ISSI
5909
1794956
02-3G
ISSI
5607
1794971
02-2G
ISSI
5610
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RFQ
Part No
Manufacturer
Description
Qty
Price
XCZU2CG-1SBCVJ478E
Manufacturer
:
XILINX
Part No
:
XCZU2CG-1SBVA484E
Order Code
:
2760177
Product Range
:
Zynq UltraScale+ MPSoC Family
Series
:
MPSoC
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Product Overview
The Xilinx Zynq® UltraScale+™ MPSoC family provide 64bit processor scalability while combining real-time control with soft, hard engines for graphics, video, waveform and packet processing. Built on a common real-time processor and programmable logic equipped platform, 3 distinct variants include dual (CG), quad application processor and GPU (EG) and video codec (EV) devices, creating unlimited possibilities for 5G wireless, next generation ADAS, industrial IoT applications. The CG devices hasheterogeneous processing system comprised of dual-core Cortex™-A53, dual-core Cortex™-R5 real-timeprocessing unit.
- Zynq® UltraScale+™ MPSoCs are available in -3, -2, -1 speed grades
- Innovative ARM® + FPGA architecture for differentiation, analytics & control
- Extensive OS, middleware, stacks, accelerators and IP ecosystem
- Multiple levels of hardware and software security, architected to deliver low system power
- Integration delivering the de facto All Programmable platform
- Up to 5X system level performance per watt over Zynq®-7000 SoCs
- Industry leading design tools, C/C++, open CL design abstractions